Intel: More with less bell speed
On 23 August next will Intel-senior official Paul Otellini on the halfjaarlijkse Intel Developers Conference (IDF) details about the next generation Intel-processors reveal.
Next to a number doorvoeringen of existing chips as the Centrino, the most attention in Otellini's will keynote Go out chips to the generation that the present Pentium 4 relay go processor and Pentium M mobile chips.
The code names of the chips are everything longer known: the 'Merom' is a dual-core mobile processor on base of 65 nanometer technology. Of this Merom also a desktopversie comes out, code name 'Conroe'.
Most important targets for Intel is the realization of more rack power, without having that per se more bell speed for necessarily. The Celeron, Pentium 4 and Xeon-processors support now on NetBurst, by which the processors process can data per assimilations cycle more in comparison with some older Intel-chips.
Intel want to replace about that NetBurst through someone else technique that by lower bell speeds more information processes per cycle and at the same time less stream consumes.
Besides will the Pentium 4-branch probably become afgebouwd and gets the energiezuinige, powerful Pentium M the preference. Merom is the logical next step in the Pentium M. Merom is dual-core (two separate assimilations unities in the same housing), 64-availed and contain technical tricks around protection, virtualisering and SSE3 multimedia-expansions.
The first tangible products on base of the new Intel-chips would must appeared then in the second half of 2006. That Intel is expected will discuss also the longer term planning on the IDF, plan possible even in large lines till at 2015.