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IBM and Advanced Micro Devices (AMD) a new manner have considered to “to stretch” silicium. The technique must to produce make more fast, cheaper and easy processors possible.

The new technique am called “Dual Stress Liners” (DSL) and simplifies the trial of “stretch” of silicium. Through the distance between the silicium-atoms in a chip to increase, experience electrons less resistance and can they more fast of one sharpen to the other streams.

Currently it become sold already chips with DSL, but both enterprises will apply from the first quarter of 2005 the technique also in the production of 90-nanometer processors what the verspreidng of the technique promotes strengthen.

DSL is considered the performances of transistors in the chips with 24 per cent to improve, without that the quality of the production process below it suffers. Because of this is the technique relative cheaply closed to fit.

DSL wakkert again the competition fight at between Intel on the one hand and IBM and AMD on the other hand. Intel uses a comparable technique of “strained silicon” in the present 90-nanometer chips and expects against end this year an improved version for 65-nanometer chips to introduce. Intel maintains will improve that the performances of transistors because of this with 30 per cent.

IBM, AMD and Intel will this week more details release about their straining-technology on the International Electron Devices Meeting in San Francisco.

The technique of “strained silicon” changes on atomair level the structure of silicium, so that the geleiding of electrons in a transistor lapses more fast. Faster transistors, the at/from-inside a chip bud, must see to for better performances and a lower energieverbruik. The “stretch” is comparable to between poles through slalommen: how further the poles of each other stand, how more speeds you can make.